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AI ambition is pushing copper to its breaking point

Nov 28, 2024 - theregister.com
Datacenters are increasingly adopting denser, more power-hungry systems, with 19-inch racks now exceeding 120 kilowatts in high-density configurations. This trend is driven by the need to support larger AI models, leading to the use of high-speed interconnects. However, the faster data is transferred, the shorter the distance the signal can be maintained. This has led to the exploration of optics, which can maintain a signal over a larger distance. However, current pluggable optics are not efficient or fast enough. Ayar Labs suggests integrating optics directly into the compute to alleviate bandwidth bottlenecks and lower rack densities.

Silicon photonics startup Ayar Labs has been developing an optical interconnect chiplet since 2015, designed to be co-packaged with a CPU or GPU for higher bandwidth over longer distances. This could potentially replace Nvidia's NVLink or AMD's Infinity Fabric to connect multiple chips. The technology could allow a compute and memory domain to stretch across hundreds of GPUs spread among dozens of racks, reducing power and thermal densities per rack. However, challenges remain, including developing a chip that can match existing copper interconnects on power and bandwidth, and developing communication protocols.

Key takeaways:

  • Datacenters are trending towards denser, more power-hungry systems to support larger AI models, pushing power demands beyond 120 kilowatts in high-density configurations.
  • Chip designers like Nvidia use high-speed interconnects to make multiple GPUs behave like a single device, but the faster data is shuffled across a wire, the shorter the distance at which the signal can be maintained.
  • Ayar Labs contends that by integrating optics directly into the compute, chipmakers can alleviate bandwidth bottlenecks and lower the rack densities required to support growing model parameter counts.
  • Despite the potential of silicon photonics, the technology faces challenges before it can be integrated into production hardware, including developing a chip that can match existing copper interconnects on power and bandwidth, and developing communication protocols.
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