This shortage affects Nvidia's H100 and A100, which power many popular AI models, and AMD's upcoming Instinct MI300-series accelerators, which also use CoWoS packaging technology. Other companies like Samsung and Intel use different packaging technologies. Samsung uses I-Cube, H-Cube, and X-Cube, while Intel uses its own tech, EMIB for 2.5D packaging and Foveros for vertically stacking chiplets.
Key takeaways:
- TSMC, the company that fabricates GPUs for Nvidia and components for other tech companies, has warned that it will be difficult to source parts for Nvidia's top specced GPUs until at least the end of 2024 due to a lack of advanced packaging capacity.
- TSMC is currently only able to meet about 80 percent of demand for its chip on wafer on substrate (CoWoS) packaging technology, which is used in some of the most advanced chips on the market.
- TSMC chairman Mark Liu expects this to be a temporary bottleneck and that additional CoWoS capacity should be available within a year and a half. TSMC has plans to expand its advanced packaging capacity in Taiwan with a $3 billion facility.
- Other companies, such as Samsung and Intel, use different packaging technologies, potentially providing alternatives to TSMC's CoWoS. Samsung uses I-Cube and H-Cube for 2.5D packaging and X-Cube for 3D packaging, while Intel uses its own tech called embedded multi-die interconnect bridge (EMIB) for 2.5D packaging and Foveros for vertically stacking chiplets.